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Description
5.1.3
5.1.4
5.2
5.3
5.4
JTAG
Standard JTAG programming interface is provided to the sequencer through the J6 connector. The
sequencer address must be set to 126 decimal to invoke sequencer JTAG operation. Install shunts at J3,
J4, J7, and J8, and remove the shunts on J13 to use the JTAG interface.
RS232 Debug
A serial debug port is provided to the sequencer through the J12 connector. Install J15 when using the
RS232 interface. For debug, the terminal listens only to the sequencer.
Input Power
The 5-Vdc EVM input power is provided through the USB interface. For stand-alone operation without a
USB source, EVM input power can be provided at J1 (standard dc jack) or J5 (screw jack). A wall or
laptop adapter with 200-mA capability and 2.5-mm I.D. × 5.5-mm O.D. × 9.5-mm dc jack can power the
EVM.
Status LEDs
Visual status information for the GPI, GPIO, and PMBus signals (control and alert) is provided. Logic high
at GPI1-4 or GPIO1-21 illuminates the associated LED. The GPIO status LEDs can be enabled (J25 shunt
installed) or disabled (J25 shunt not installed) to prevent the LED bias from affecting the logic state of the
GPIO signal during device reset. In addition, the sequencer PWM signals PWM1, PWM2, and
FPWM1-FPWM8 can be disconnected from the status LEDs through the use of shunts when used for
voltage margining.
Analog Monitor Inputs
The sequencer monitor inputs can be used to monitor offboard voltages. Each monitor input has a 4-k Ω
resistor to ground. Ensure that the external source does not exceed 2.5 V.
SLVU464 – July 2011
UCD90SEQ48EVM-560: — 48-Pin Sequencer Development Board
Copyright ? 2011, Texas Instruments Incorporated
9
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